Online ISSN: 2515-8260

Keywords : Arithmetic Logic Unit (ALU)

Design and Simulation of Heterogeneous Adder Using Xilinx Vivado

Manish Kumar; Abhay Chaturvedi

European Journal of Molecular & Clinical Medicine, 2020, Volume 7, Issue 4, Pages 151-158

The adders are logic circuits designed to execute “high speed Arithmetic operations” in Arithmetic Logic Unit (ALU) utilized in processors. The basic Adders are “Half Adder and Full adder”. The diverse kinds of adders are Carry Look ahead Adder (CLA), Ripple Carry Adder(RCA), Carry Select Adder (CSLA), &Carry Skip Adder(CSKA). In this manuscript, Heterogeneous adder (HA) architecture is designed with support of diverse Homogeneous adders and Heterogeneous adders are contrasted with Homogeneous adders in terms of power, delay, & area. This architecture is based on a VHDL and compares their performance with Xilinx VIVADO software tool.